Conceptual Modeling and Simulation

System-level design requires behavioral models of its complex components in order to validate the designs, synthesize implementations and generate tests. Descriptions of these components are often only available as English descriptions. Developing behavioral models from natural language descriptions has been a tedious and time consuming task. This paper describes the semiautomatic generation of conceptual models from text and a simulator for these models. The conceptual modeling language is a knowledge representation notation (semantic hypergraphs), and simulation of these abstract descriptions based on the VHDL executiondescriptions based on the VHDL execution model is described. Simulation at the conceptual level avoids having to add the extraneous declarations and other syntactic artifacts necessary with more conventional description languages. These declarations not only take time, but also prejudice the